The present invention relates to an amplifier circuit, and more particularly, to an amplifier circuit capable of performing a push-pull output and having a reduced power consumption, which is applied to a semiconductor integrated circuit for amplifying signals and performing impedance conversion.
An example of a conventional amplifier circuit capable of performing a push-pull output is shown in FIG. 6 and described in Japanese Patent Publication 2688477. In this amplifier, a PMOS transistor (QPf) and an NMOS transistor (Qnf) which adopt a complementary architecture are connected in a push-pull type configuration as final components of a class AB output stage or a class B output stage, wherein nodes thereof constitute output terminals (OUT) of the stage. Two transconductance amplifier circuits (Tp, Tn) have respective output terminals thereof connected to gate terminals of the PMOS transistor (Qpf) and the NMOS transistor (Qnf), have respective inverted input terminals thereof connected to each other thus forming an input (IN) of the amplifier, and have respective non-inverted input terminals thereof connected to the output terminals (OUT) through respective feedback systems (Fp, Fn).
In this example, although it is possible to have an advantage that the push-pull output operation can be surely performed, since the feedback is applied to the gate of the MOS transistor at the output stage from the output through the feedback systems and the transconductance amplifier, there exist characteristics that when the amplifier is applied to the operational amplifier, the stability cannot be ensured and the frequency characteristics deteriorate.
A second example of a conventional differential amplifier is shown in FIG. 7 and described in Japanese Unexamined Patent Publication 1996-222972. The amplifier includes a differential input stage (38), an output stage (40) and a in-phase feedback stabilizing circuit (42). The differential input stage (38) is constructed by respectively connecting transistors (Q3, Q4) as loads to two transistors (Q1, Q2) which constitute amplifying elements thereof. The output stage (40) is constituted of a transistor (Q10) which inputs an output of one transistor (Q1) of the differential input stage (38), a transistor (Q11) which is connected to the transistor (Q10) as a load, a transistor (Q12) which constitutes a current mirror circuit together with the transistor (Q11) and a transistor (Q13) which inputs an output of another transistor (Q2) of the differential input stage, wherein the transistor (Q12) and the transistor (Q13) constitute a push-pull output circuit and an output is taken out from a node thereof. Further, the in-phase feedback stabilizing circuit (42) is constituted of a transistor (Q8) which inputs an output of one transistor (Q1) of the differential input stage, a transistor (Q9) which inputs an output of another transistor (Q2) of the differential input stage, transistors (Q6, Q7) which are connected to these transistors (Q8, Q9) as common loads so as to constitute a current mirror circuit, and a transistor Q5 which is connected to the transistor (Q6) as a load and constitutes a current mirror circuit together with the transistors (Q3, Q4) which constitute loads of the differential input stage.
In this example, although the stability of the push-pull output circuit which constitutes the output stage can be ensured, since one transistor (Q12) which constitutes the output stage forms the current mirror circuit together with the transistor (Q11) and hence, there exists the characteristic that an output current is restricted by a bias current of the transistor (Q11).
When it is necessary to use signal outputs of the operational amplifier in a full voltage range between the first power source and the second power source or when it is necessary to increase an output current such that the operational amplifier can cope with a light load, the architecture of the output stage of the operational amplifier uses transistors having a complementary structure such as the PMOS transistor and the NMOS transistor and the push-pull output which can perform a class AB operation or a class B operation using the drain (collector in bipolar operation) output is performed and hence, it is possible to reduce the consumption of current of the operational amplifier in the still operation whereby a reduction of the power consumption can be realized.
However, when the push-pull output is adopted, to provide a stable operational amplifier in which an output voltage does not receive the influence of the fluctuation of output voltage and the fluctuation of temperature or the like, there has been a drawback that the bias control method of gates of the PMOS transistor and the NMOS transistor (bases in bipolar transistors) used in an output stage is difficult and hence, the circuit architecture of the output stage of the operational amplifier becomes complicated whereby current consumption is increased.
In view of the above, it would be desirable to provide an amplifier circuit which has a simple circuit architecture and is capable of performing a push-pull output function to obtain low power consumption.